Understanding the DDR JEDEC Standard Core
While JEDEC does define many fundamental rules for DDR, it doesn't solve all the problems related to controllers, PHYs, board levels, packaging, BIOS, training, and mass production consistency.
While JEDEC does define many fundamental rules for DDR, it doesn't solve all the problems related to controllers, PHYs, board levels, packaging, BIOS, training, and mass production consistency.
High-density interconnect (HDI) printed circuit boards (PCBs) are a key carrier for the upgrading of the electronic information industry, and are core components supporting the miniaturization of consumer electronics, the high-speed development of communication systems, and the high-density computing infrastructure.
EMC (Electromagnetic Compatibility) is one of the most troublesome areas for hardware engineers. Unlike impedance calculations, it doesn't have explicit formulas, nor does it have clear checklists like routing rules. EMC problems are often the result of multiple factors combined, and troubleshooting is like "whack-a-mole"—plug one hole, and two more pop up.
In the radio frequency (RF) industry, a network is a device with one or more interfaces (ports). Each port can do the following: conduct RF signals, absorb signals, or reflect signals back.
Engineers working on energy storage BMS, inverters, and motor controllers almost invariably face the same question when designing high-current PCB traces: exactly how thick should the copper foil be to ensure cost-effectiveness?
A server memory module looks highly sophisticated—featuring a PCB, memory chips, gold contacts, registers, SPD, PMIC, and more—but if you strip it down to its most fundamental level, you find a "tiny capacitor" that is prone to leakage and somewhat temperamental.
Electromagnetic Compatibility (EMC) is an unavoidable hurdle in the development of electronic equipment. Among the various EMC issues, the two most critical and frequently encountered sources of interference are differential-mode interference and common-mode interference.
In this article, rather than diving straight into complex ESD protection circuits, we will start with the fundamentals: What is ESD? Why are chips vulnerable to it? What are the differences between the HBM, MM, and CDM models? How is ESD robustness tested in an engineering context?