Description
HDI PCB lamination is a core process in high-density interconnect (HDI) board manufacturing. Through multiple laminations, it achieves precise stacking of multi-layer circuits, a key technology ensuring inter-layer alignment accuracy and improving product yield.
I. Core Definition
HDI PCB lamination, also known as sequential lamination, is a core process in HDI board manufacturing that uses multiple hot-pressing processes to sequentially bond inner core boards, prepregs, and copper foils to build a multi-layer interconnect structure. It adapts to the multi-stage stacking requirements of HDI from order 1 to higher orders, ensuring reliable connections between inter-layer circuits.
Material Pretreatment: Matching the core board and prepreg with the corresponding number of layers and copper thickness, controlling the consistency of the coefficient of thermal expansion (CTE) of materials, and reducing the risk of thermal deformation from the source.
Precise Alignment: Employing CCD automatic optical alignment + X-ray targeting technology, the inter-layer alignment accuracy is controlled within ±25μm, avoiding lamination misalignment.
Hot pressing: Multi-segment temperature-pressure curves are executed in a vacuum environment to control the heating rate and pressure distribution, avoiding inner layer misalignment caused by uneven resin flow. It is suitable for three-tier and higher blind/buried via structures.
Post-inspection: After pressing, AOI optical inspection and cross-sectional analysis are used to check for defects such as interlayer misalignment and uneven dielectric thickness, ensuring batch consistency.
III. Mainstream Application Scenarios This process is widely suitable for fields requiring high density and high reliability:
AI server 8-layer and higher HDI core boards can reduce the interlayer misalignment defect rate to below 0.5%, ensuring the stability of high-speed signal transmission.
5G base station RF module HDI boards, after optimization, can reduce the interlayer misalignment defect rate by more than 80%, adapting to high-frequency, low-loss requirements.
High-end HDI motherboards for smartphones and foldable screen terminals support ultra-thin, high-wiring-density product designs.
High-reliability HDI boards for automotive electronics and industrial control use symmetrical lamination to control warpage and meet stringent operating conditions.
HDI PCB lamination process requires control of interlayer offset.
In HDI PCB lamination processes, controlling interlayer misalignment can be systematically implemented from multiple dimensions. The core is to stably control the misalignment within ±25μm or even higher precision, far exceeding the ±75μm standard requirement of IPC-6012C, ensuring high-yield mass production of multilayer HDI PCBs.
I. Pre-design Material Control: High Tg and low CTE core boards and prepregs are selected, with strict control over resin content and flow parameters to reduce deformation differences caused by thermal expansion and contraction.
A symmetrical stack-up design is adopted, with critical high-speed layers located close to the board center to avoid stress unevenness caused by mixing different materials. Misalignment trends are predicted in advance through process simulation.
II. High-Precision Alignment System Construction: CCD automatic optical alignment + X-ray drilling technology is used to unify the alignment reference onto the inner layer copper pattern, replacing the traditional mechanical hole reference and eliminating reference misalignment errors at the source.
LDI laser direct imaging technology is introduced to completely avoid pattern offset caused by film stretching, achieving alignment accuracy at the ±10μm level.
III. Optimization of Pressing Parameters
A multi-stage gradient heating-pressure control program is adopted, with the heating rate controlled at 2-5℃/min to prevent uneven resin flow from causing core board displacement.
The boards are pre-baked and dehumidified before pressing, and a high-parallelism vacuum press is used to reduce issues such as slippage and uneven local stress during pressing.
IV. Closed-Loop Management of the Entire Process
A database of board expansion and contraction is established. Before photoplotting, scaling compensation is performed on the X/Y axes of different layers to offset the expected deformation after pressing.
AOI and X-Ray inspections are configured for each key process. SPC is used to statistically analyze offset data and adjust process parameters in real time to achieve closed-loop control of "measurement-analysis-compensation".
Below is a table of applicable HDI interlayer offset control parameters, covering industry-standard parameters and core control indicators for different process stages.
Control Dimension
Key Parameter Item
Requirements for Conventional HDI Boards
Requirements for High-order HDI/AI Computing Boards
Control Purpose
Industry Basic Standard
Interlayer Alignment Offset (IPC Class 2)
≤75μm
-
Basic compliance for consumer/industrial grade products
Industry Basic Standard
Interlayer Alignment Offset (IPC Class 3)
≤50μm
≤25μm
High reliability requirements for military, medical, and high-end computing products
Material Control
CTE Matching of Core Board/PP Prepreg
Same-batch CTE deviation ≤ 2ppm/℃
Same-batch CTE deviation ≤ 1ppm/℃
Eliminate systematic deformation caused by thermal expansion and contraction
Material Control
Resin Content Tolerance of PP Prepreg
±3%
±2%
Avoid uneven resin flow pushing core board displacement
Alignment Process
Accuracy of Optical Alignment System
±15μm
±8μm
Reduce reference alignment error from the source
Alignment Process
Positioning Accuracy of X-Ray Target Hole
±20μm
±10μm
Unify the reference of inner layer pattern and drilling
Lamination Process
Heating Rate
2-5℃/min
1.5-3℃/min
Balance interlayer stress and reduce uneven shrinkage
Lamination Process
Lamination Vacuum Degree
≤5mbar
≤3mbar
Avoid local displacement caused by interlayer bubbles
Inspection Process
AOI Offset Detection Threshold after Lamination
≤60μm
≤30μm
intercept out-of-tolerance boards in advance, avoid waste in subsequent processes
Special Scene
Cumulative Offset of 24-layer Multi-order HDI
-
≤40μm
Ensure the alignment yield of stacked blind/buried vias ≥92%
Below is a detailed explanation of the HDI interlayer offset control parameters.
Definition: The positional deviation of adjacent layers in the X/Y directions from the design baseline after lamination. It is a core indicator for measuring alignment accuracy.
Control Logic: For standard HDI, the deviation should be ≤50μm; for high-order HDI, ≤25μm. This prevents blind via misalignment from causing ring breakage and open-circuit failure, ensuring a first-pass yield of ≥96% for stacked vias.
2. Material CTE Matching
Definition: The difference in the coefficient of thermal expansion (CTE) between different core boards and prepregs, reflecting the consistency of material deformation under heat.
Control Logic: The CTE deviation of materials in the same batch should be controlled within 1-2ppm/℃ to eliminate systematic layer misalignment caused by differences in thermal expansion and contraction of different materials.
3. PP Sheet Resin Content Tolerance
Definition: The allowable fluctuation range of the resin content in the total mass of the prepreg.
Control Logic: Tolerance should be controlled within ±2%~±3% to prevent uneven resin flow during lamination from causing core board displacement and reducing localized layer misalignment.
4. Optical Alignment System Accuracy: Definition: The achievable error of a CCD automatic alignment device in identifying the inner target and calibrating the interlayer position.
Control Logic: Accuracy must reach ±8~±15μm, replacing traditional mechanical positioning and eliminating cumulative alignment errors caused by film deformation.
5. Pressure Pressing Heating Rate: Definition: The rate at which the cavity temperature rises per minute during the pressing process.
Control Logic: Controlled at 1.5~5℃/min to avoid rapid resin flow and uneven interlayer stress caused by excessive heating, reducing irreversible layer misalignment deformation after cooling.
6. Pressure Pressing Vacuum: Definition: The absolute pressure value within the pressure pressing cavity.
Control Logic: Maintained at a high vacuum environment of 3~5mbar to prevent residual air bubbles between layers from causing localized pressure unevenness and leading to localized layer misalignment.
